Page 74 - 2017 Brochure
P. 74
研究員
張原豪 Yuan-Hao Chang
Associate Research Fellow
Ph.D., Computer Science and Information Engineering,
National Taiwan University
Tel: +886-2-2788-3799 ext. 1612 Fax: +886-2-2782-4814
Email: johnson@iis.sinica.edu.tw
http://www.iis.sinica.edu.tw/pages/johnson
• Best paper nomination, ACM/IEEE Design Automation Conference (2014, 2016, 2007)
• Ta-You Wu Memorial Award, Ministry of Science and Technology (2016)
• Best paper nomination, ACM/IEEE Asia and South Pacific Design Automation Conference (2016)
• Outstanding Youth Electrical Engineer Award, Chinese Institute of Electrical Engineering (2014)
• Best Paper Nomination, ACM/IEEE International Conference on Hardware/Software Codesign and System Synthesis (2014)
• Associate Research Fellow, Institute of Information Science, Academia Sinica (2015-present)
• Assistant Research Fellow, Institute of Information Science, Academia Sinica (2011-2015)
Research Description translation layer is mainly in charge of address translation, garbage
collection, and wear leveling for the underlying chips.
My research is focused on embedded systems, with a major
emphasis on improving the performance, reliability, and endurance Another recent research focus is on operating system designs
of storage systems with different types of non-volatile memories. for embedded systems with one-memory architecture. These
My interests have recently grown to include byte-addressable non- systems have byte-addressable non-volatile memory (NVM) as
volatile memory as both main memory and storage for embedded both main memory and storage for embedded systems. To exploit
systems. the benefits of one-memory architecture, conventional operating
systems need to be modified because they manage main memory
Embedded systems, especially battery-powered consumer and file systems separately, resulting in data movements between
electronics and mobile computing systems like smartphones, main memory and storage. In one-memory architecture systems
usually adopt flash memory devices as their storage systems. both main memory and storage are in the same address space,
Due to the shrinking of fabrication process and advances in making these movements unnecessary. Thus, our research goal is
manufacturing technology, the density and capacity of flash to propose new operating system designs, including new memory
memory chips has grown dramatically in recent years; however, management and file systems designs, that can jointly manage
performance, reliability and endurance have become major product memory and storage space on the same NVM device. In doing so,
design issues. To address these issues, we are interested in the advantages of one-memory architecture may be fully realized.
storage device level solutions. Our goal is to resolve these issues
with (flash) management designs in the software/firmware layer
(i.e., flash translation layer) of flash storage devices where the flash
Publications 6. Ming-Chang Yang, Yuan-Hao Chang, and Che-Wei Tsao, “Byte-
addressable Update Scheme to Minimize the Energy Consumption
1. Yuan-Hung Kuan, Yuan-Hao Chang, Tseng-Yi Chen, Po-Chun of PCM-based Storage Systems,” ACM Transactions on Embedded
Huang, and Kam-Yiu Lam, “Space-Efficient Index Scheme for PCM- Computing Systems (TECS), vol. 15, no. 3, pp. 55:1-55:20, Jun. 2016.
based Multiversion Databases in Cyber-Physical Systems,” ACM
Transactions on Embedded Computing Systems (TECS), vol. 16, no. 1, 7. Tseng-Yi Chen, Yuan-Hao Chang, Ming-Chang Yang, Yun-Jhu
pp. 21:1-21:26, Oct. 2016. Chen, Hsin-Wen Wei, and Wei-Kuan Shih, “Multi-grained Block
Management to Enhance the Space Utilization of File Systems on
2. Ming-Chang Yang, Yuan-Hao Chang, Che-Wei Tsao, and Chung- PCM Storages,” IEEE Transactions on Computers (TC), vol. 65, no. 6,
Yu Liu, “Utilization-aware Self-tuning Design for TLC Flash Storage pp. 1831-1845, Jun. 2016.
Devices,” IEEE Transactions on Very Large Scale Integration Systems
(TVLSI), vol. 24, no. 10, pp. 3132-3144, Oct. 2016. 8. Ming-Chang Yang, Yuan-Hao Chang, Tei-Wei Kuo, and Fu-Hsin
Chen, “Reducing Data Migration Overheads of Flash Wear Leveling
3. Ming-Chang Yang, Yuan-Hao Chang, and Tei-Wei Kuo, “Virtual in a Progressive Way,” IEEE Transactions on Very Large Scale
Flash Chips: Reinforcing the Hardware Abstraction Layer to Improve Integration Systems (TVLSI), vol. 24, no. 5, pp. 1808-1820, May
Data Recoverability of Flash Devices,” IEEE Transactions on 2016.
Computers (TC), vol. 65, no. 9, pp. 2872-2883, Sep. 2016.
9. Yu-Ming Chang, Yuan-Hao Chang, Tei-Wei Kuo, Yung-Chun Li,
4. Ming-Chang Yang, Yuan-Hao Chang, Yuan-Hung Kuan, and Che-Wei and Hsiang-Pang Li, “Disturbance Relaxation for 3D Flash Memory,”
Tsao, “Graceful Space Degradation: An Uneven Space Management IEEE Transactions on Computers (TC), vol. 65, no. 5, pp. 1467-1483,
for Flash Storage Devices,” IEEE Transactions on Computer-Aided May 2016.
Design of Integrated Circuits and Systems (TCAD), vol. 35, no. 9, pp.
1425-1434, Sep. 2016. 10. Ming-Chang Yang, Yuan-Hao Chang, Tei-Wei Kuo, and Po-Chun
Huang, “Capacity-independent Address Mapping for Flash Storage
5. Sheng-Wei Cheng, Yuan-Hao Chang, Tseng-Yi Chen, Yu-Fen Chang, Devices with Explosively Growing Capacity,” IEEE Transactions on
Hsin-Wen Wei, and Wei-Kuan Shih, “Efficient Warranty-Aware Computers (TC), vol. 65, no. 2, pp. 448-465, Feb. 2016.
Wear-Leveling for Embedded Systems with PCM Main Memory,”
IEEE Transactions on Very Large Scale Integration Systems (TVLSI),
vol. 24, no. 7, pp. 2535-2547, Jul. 2016.
72 研究人員 Research Faculty
張原豪 Yuan-Hao Chang
Associate Research Fellow
Ph.D., Computer Science and Information Engineering,
National Taiwan University
Tel: +886-2-2788-3799 ext. 1612 Fax: +886-2-2782-4814
Email: johnson@iis.sinica.edu.tw
http://www.iis.sinica.edu.tw/pages/johnson
• Best paper nomination, ACM/IEEE Design Automation Conference (2014, 2016, 2007)
• Ta-You Wu Memorial Award, Ministry of Science and Technology (2016)
• Best paper nomination, ACM/IEEE Asia and South Pacific Design Automation Conference (2016)
• Outstanding Youth Electrical Engineer Award, Chinese Institute of Electrical Engineering (2014)
• Best Paper Nomination, ACM/IEEE International Conference on Hardware/Software Codesign and System Synthesis (2014)
• Associate Research Fellow, Institute of Information Science, Academia Sinica (2015-present)
• Assistant Research Fellow, Institute of Information Science, Academia Sinica (2011-2015)
Research Description translation layer is mainly in charge of address translation, garbage
collection, and wear leveling for the underlying chips.
My research is focused on embedded systems, with a major
emphasis on improving the performance, reliability, and endurance Another recent research focus is on operating system designs
of storage systems with different types of non-volatile memories. for embedded systems with one-memory architecture. These
My interests have recently grown to include byte-addressable non- systems have byte-addressable non-volatile memory (NVM) as
volatile memory as both main memory and storage for embedded both main memory and storage for embedded systems. To exploit
systems. the benefits of one-memory architecture, conventional operating
systems need to be modified because they manage main memory
Embedded systems, especially battery-powered consumer and file systems separately, resulting in data movements between
electronics and mobile computing systems like smartphones, main memory and storage. In one-memory architecture systems
usually adopt flash memory devices as their storage systems. both main memory and storage are in the same address space,
Due to the shrinking of fabrication process and advances in making these movements unnecessary. Thus, our research goal is
manufacturing technology, the density and capacity of flash to propose new operating system designs, including new memory
memory chips has grown dramatically in recent years; however, management and file systems designs, that can jointly manage
performance, reliability and endurance have become major product memory and storage space on the same NVM device. In doing so,
design issues. To address these issues, we are interested in the advantages of one-memory architecture may be fully realized.
storage device level solutions. Our goal is to resolve these issues
with (flash) management designs in the software/firmware layer
(i.e., flash translation layer) of flash storage devices where the flash
Publications 6. Ming-Chang Yang, Yuan-Hao Chang, and Che-Wei Tsao, “Byte-
addressable Update Scheme to Minimize the Energy Consumption
1. Yuan-Hung Kuan, Yuan-Hao Chang, Tseng-Yi Chen, Po-Chun of PCM-based Storage Systems,” ACM Transactions on Embedded
Huang, and Kam-Yiu Lam, “Space-Efficient Index Scheme for PCM- Computing Systems (TECS), vol. 15, no. 3, pp. 55:1-55:20, Jun. 2016.
based Multiversion Databases in Cyber-Physical Systems,” ACM
Transactions on Embedded Computing Systems (TECS), vol. 16, no. 1, 7. Tseng-Yi Chen, Yuan-Hao Chang, Ming-Chang Yang, Yun-Jhu
pp. 21:1-21:26, Oct. 2016. Chen, Hsin-Wen Wei, and Wei-Kuan Shih, “Multi-grained Block
Management to Enhance the Space Utilization of File Systems on
2. Ming-Chang Yang, Yuan-Hao Chang, Che-Wei Tsao, and Chung- PCM Storages,” IEEE Transactions on Computers (TC), vol. 65, no. 6,
Yu Liu, “Utilization-aware Self-tuning Design for TLC Flash Storage pp. 1831-1845, Jun. 2016.
Devices,” IEEE Transactions on Very Large Scale Integration Systems
(TVLSI), vol. 24, no. 10, pp. 3132-3144, Oct. 2016. 8. Ming-Chang Yang, Yuan-Hao Chang, Tei-Wei Kuo, and Fu-Hsin
Chen, “Reducing Data Migration Overheads of Flash Wear Leveling
3. Ming-Chang Yang, Yuan-Hao Chang, and Tei-Wei Kuo, “Virtual in a Progressive Way,” IEEE Transactions on Very Large Scale
Flash Chips: Reinforcing the Hardware Abstraction Layer to Improve Integration Systems (TVLSI), vol. 24, no. 5, pp. 1808-1820, May
Data Recoverability of Flash Devices,” IEEE Transactions on 2016.
Computers (TC), vol. 65, no. 9, pp. 2872-2883, Sep. 2016.
9. Yu-Ming Chang, Yuan-Hao Chang, Tei-Wei Kuo, Yung-Chun Li,
4. Ming-Chang Yang, Yuan-Hao Chang, Yuan-Hung Kuan, and Che-Wei and Hsiang-Pang Li, “Disturbance Relaxation for 3D Flash Memory,”
Tsao, “Graceful Space Degradation: An Uneven Space Management IEEE Transactions on Computers (TC), vol. 65, no. 5, pp. 1467-1483,
for Flash Storage Devices,” IEEE Transactions on Computer-Aided May 2016.
Design of Integrated Circuits and Systems (TCAD), vol. 35, no. 9, pp.
1425-1434, Sep. 2016. 10. Ming-Chang Yang, Yuan-Hao Chang, Tei-Wei Kuo, and Po-Chun
Huang, “Capacity-independent Address Mapping for Flash Storage
5. Sheng-Wei Cheng, Yuan-Hao Chang, Tseng-Yi Chen, Yu-Fen Chang, Devices with Explosively Growing Capacity,” IEEE Transactions on
Hsin-Wen Wei, and Wei-Kuan Shih, “Efficient Warranty-Aware Computers (TC), vol. 65, no. 2, pp. 448-465, Feb. 2016.
Wear-Leveling for Embedded Systems with PCM Main Memory,”
IEEE Transactions on Very Large Scale Integration Systems (TVLSI),
vol. 24, no. 7, pp. 2535-2547, Jul. 2016.
72 研究人員 Research Faculty
