TIGP (AIoT) -- Unleashing the Power of Process Variation: Elevating Flash Memory to New Heights in Endurance and Performance
- LecturerProf. Tseng-Yi Chen (Department of Computer Science & Information Engineering, National Central University)
Host: TIGP (AIoT) - Time2023-12-08 (Fri.) 14:00 ~ 16:00
- LocationAuditorium 106 at IIS new Building
Abstract
This talk addresses process variation challenges in 3D flash memory, focusing on bad block management and superpage organization. The first paper introduces a cluster-based management policy, leveraging spatial correlation among flash blocks, resulting in a 2x lifetime improvement with comparable failure rates. A critical-block first reallocation scheduling mitigates I/O performance impact. The second paper identifies flash superpage organization issues due to process variation, proposing the Process-Variation Check scheme (PV Check) for dynamic superpage optimization. PV Check reduces extra program and erase latency by 16.61% and 34.55%, respectively, compared to traditional methods, significantly improving SSD performance.